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  _______________general description maxim? redesigned DG408 and dg409 cmos analog multiplexers now feature guaranteed matching between channels (8 max) and flatness over the specified sig- nal range (9 max). these low on-resistance muxes (100 max) conduct equally well in either direction and feature guaranteed low charge injection (15pc max). in addition, these new muxes offer low input off-leakage current over temperature?ess than 5na at +85?. the DG408 is a 1-of-8 multiplexer/demultiplexer and the dg409 is a dual 4-channel multiplexer/demultiplex- er. both muxes operate with a +4.5v to +30v single supply and with ?.5v to ?0v dual supplies. esd pro- tection is guaranteed to be greater than 2000v per method 3015.7 of mil-std-883. these improved muxes are pin-compatible plug-in upgrades for the industry standard DG408 and dg409. ________________________applications sample-and-hold circuits test equipment guidance and control systems communications systems data-acquisition systems audio signal routing ____________________________features ? pin-compatible plug-in upgrades for industry standard DG408/dg409 ? guaranteed matching between channels, 8 max ? guaranteed on-resistance flatness, 9 max ? guaranteed low charge injection, 15pc max ? low on-resistance, 100 max ? input leakage, 5na max at +85? ? low power consumption, 1.25mw max ? rail-to-rail signal handling ? digital input controls ttl/cmos compatible ? esd protection >2000v per method 3015.7 DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers ________________________________________________________________ maxim integrated products 1 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 a1 a2 gnd v+ s1 v- en a0 top view DG408 s5 s6 s7 s8 d s4 s3 s2 dip/so dg409 appears at end of data sheet. decoders/drivers a0 a1 a2 en s8 s7 s6 s5 s4 s3 s2 s1 d v+ v- gnd dg409 appears at end of data sheet. DG408 1-of-8 mux /demux ______________ordering information _________________pin configurations _______________functional diagrams call toll free 1-800-998-8800 for free samples or literature. 19-4725; rev 1; 8/95 part DG408 cj DG408cy DG408c/d 0? to +70? 0? to +70? 0? to +70? temp. range pin-package 16 plastic dip 16 narrow so dice* ordering information continued at end of data sheet. * contact factory for dice specifications. ** contact factory for availability. DG408dj -40? to +85? 16 plastic dip DG408dy -40? to +85? 16 narrow so DG408dk -40? to +85? 16 cerdip DG408ak -55? to +125? 16 cerdip**
DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics?ual supplies (v+ = 15v, v- = -15v, gnd = 0v, v ah = +2.4v, v al = +0.8v, t a = t min to t max , unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. voltage referenced to v- v+ ............................................................................-0.3v, 44v gnd .........................................................................-0.3v, 25v digital inputs, s, d (note 1)....................(v- - 2v) to (v+ + 2v) or 30ma, (whichever occurs first) continuous current (any terminal) ......................................30ma peak current, s, d (pulsed at 1ms, 10% duty cycle max) ..........................100ma continuous power dissipation (t a = +70?) plastic dip (derate 10.53mw/? above +70?) ..........842mw narrow so (derate 8.70mw/? above +70?) ............696mw cerdip (derate 10.00mw/? above +70?) ...............800mw operating temperature ranges DG408/dg409c_ ................................................0? to +70? DG408/dg409d_.............................................-40? to +85? DG408/dg409ak ..........................................-55? to +125? storage temperature range .............................-65? to +150? lead temperature (soldering, 10sec) .............................+300? v d = ?0v, v s = ?0v, sequence each switch on v d = + 10v, v s = ?0v, v en = 0v v d = + 10v, v s = ?0v, v en = 0v i s = -1.0ma, v d = ?0v i s = -1.0ma, v d = ?0v (note 4) v d = ?0v, v s = + 10v, v en = 0v conditions na -50 50 i d(on) drain-on leakage current (note 5) -10 10 -1 0.02 1 -100 100 -20 20 -1 0.02 1 na -50 50 i d(off) drain-off leakage current (note 5) -5 5 -1 0.02 1 -100 100 60 100 -10 10 -1 0.02 1 na -50 50 i s(off) source-off leakage current (note 5) -5 5 125 r ds(on) drain-source on-resistance 1.5 8 10 ? r ds(on) on-resistance matching between channels units min typ max (note 2) symbol parameter note 1: signals on s_, d_, en, a0, a1, or a2 exceeding v+ or v- are clamped by internal diodes. limit forward current to maximum current ratings. v -15 15 v analog analog signal range i s = -1.0ma, v d = ?v or 0v 1.8 9 12 r flat on-resistance flatness (note 3) t a = +25? t a = t min to t max t a = +25? t a = t min to t max t a = +25? t a = t min to t max -0.5 0.01 0.5 t a = +25? t a = t min to t max t a = +25? t a = t min to t max t a = +25? t a = t min to t max t a = +25? t a = t min to t max t a = +25? t a = t min to t max dg409 DG408 dg409 DG408 c, d a c, d a c, d a c, d a c, d a switch
DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers _______________________________________________________________________________________ 3 electrical characteristics?ual supplies (continued) (v+ = 15v, v- = -15v, gnd = 0v, v ah = +2.4v, v al = +0.8v, t a = t min to t max , unless otherwise noted.) off isolation (note 6) db -75 v iso 215 q charge injection (note 3) ns 225 t on(en) enable turn-on time 85 150 ns 10 40 t open break-before-make interval 85 175 ? -1.0 1.0 i al input current with input voltage low ? -1.0 1.0 i ah input current with input voltage high ? -10 10 i- negative supply current -1 1 ma i+ positive supply current 0.075 0.5 v ?.5 ?0 power-supply range 16 30 ? 75 units min typ max (note 2) symbol parameter crosstalk between input channels v ct -92 db logic input capacitance c in 8 pf source-off capacitance c s(off) 3 pf 26 drain-off capacitance c d(off) f = 1mhz, v en = 0.8v v d = 0v, figure 8 14 pf 37 drain-on capacitance c d(on) + c s(on) f = 1mhz, v en = 2.4v v d = 0v, figure 8 25 pf t a = +25? v en = 0v or 2.4v, v a = 0v t a = +25? v a = 2.4v or 15v t a = t min to t max t a = t min to t max t a = +25? t a = +25? t a = +25? t a = t min to t max t a = +25? t a = +25? t a = +25? t a = t min to t max conditions t a = +25? t a = +25? t a = +25? t a = +25? t a = +25? v en = 0v, r l = 1k , f = 100khz, figure 6 c l = 1.0nf, v s = 0v, r s = 0 , figure 5 figure 3 v en = 2.4v, v a(all) = 0v or 2.4v figure 4 v en = 2.4v, v a(all) = 0v or 2.4v v en = v a = 0v or 4.5v v en = 2.4v, f = 100khz, v gen = 1v p-p , r l = 1k , figure 7 f = 1mhz f = 1mhz, v en = v s = 0v, figure 8 DG408 dg409 DG408 dg409 ns 250 t trans transition time t a = t min to t max figure 2 pc ns 300 t off(en) enable turn-off time 150 t a = t min to t max t a = +25? figure 3 input supply dynamic
DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers 4 _______________________________________________________________________________________ (note 3) conditions c l = 1.0nf, v s = 0v, r s = 0 v al = 0v, v s1 = 5v, figure 3 v al = 0v, v s1 = 5v, figure 3 v s1 = 8v, v s8 = 0v, v a = 0v, figure 2 i s = -1.0ma v d = 3v or 10v pc 2 q charge injection ns 75 300 t off(en) enable turn-off time (note 3) v 012 v analog analog signal range ns 100 600 t on(en) enable turn-on time (note 3) ns 115 450 t trans transition time (note 3) 120 175 r ds(on) drain-source on-resistance units min typ max (note 2) symbol parameter electrical characteristics?ingle supply (v+ = 12v, v- = 0v, gnd = 0v, v ah = +2.4v, v al = +0.8v, t a = t min to t max , unless otherwise noted.) note 2: the algebraic convention where the most negative value is a minimum and the most positive value a maximum is used in this data sheet. note 3: guaranteed by design. note 4: ? r on = r on(max) - r on(min) . on-resistance match between channels and flatness are guaranteed only with specified voltages. flatness is defined as the difference between the maximum and minimum value of on-resistance as measured at the extremes of the specified analog signal range. note 5: leakage parameters are 100% tested at the maximum rated hot temperature and guaranteed by correlation at +25?. note 6: off isolation = 20log v d /v s , where v d = output and v s = input to off switch. t a = +25? t a = +25? t a = +25? t a = +25? t a = +25? switch dynamic
DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers _______________________________________________________________________________________ 5 120 140 160 on-resistance vs. v d (dual supplies) 100 DG408/9 toc-01 0 20 40 60 -20 20 -15 15 -10 10 -5 5 0 80 v d (v) ?v ?0v ?5v ?0v r ds(on) ( w ) 120 on-resistance vs. v d and temperature (dual supplies) 100 DG408/9 toc-02 0 20 40 60 -15 15 -10 10 -5 5 0 80 v d (v) +125? +85? +25? -55? r ds(on) ( w ) v+ = 15v v- = -15v 280 320 360 400 on-resistance vs. v d (single supply) 240 DG408/9 toc-03 40 80 120 160 15 20 10 5 0 200 v d (v) r ds(on) ( w ) 5v 10v 15v 20v 120 140 160 on-resistance vs. v d and temperature (single supply) 100 DG408/9 toc-04 0 20 40 60 15 10 5 0 80 v d (v) r ds(on) ( w ) +125? +85? +25? -55? v+ = 15v v- = 0v 30 charge injection vs. v d 20 DG408/9 toc-07 -30 -20 -10 0 -15 15 -10 10 -5 5 0 10 v d (v) q j (pc) v+ = 12v v- = 0v v+ = 15v v- = -15v 10 0.0001 -55 125 off leakage vs. temperature 1 DG408/9 toc-05 temperature ( c) off leakage (na) 25 0.01 0.001 -35 -15 65 0.1 100 1000 45 85 105 5 i no (off) i com (on) v+ = 15v v- = -15v 10 0.0001 -55 125 on leakage vs. temperature 1 DG408/9 toc-05 temperature ( c) on leakage (na) 25 0.01 0.001 -35 -15 65 0.1 100 1000 45 85 105 5 i com (on) v+ = 15v v- = -15v 100 0.001 -55 125 supply current vs. temperature 10 DG408/9 toc-08 temperature ( c) i+, i- ( m a) 25 0.1 0.01 -35 -15 65 1 45 85 105 5 i+ i- v+ = 15v v- = -15v v en = v a = 0v, 4.5v __________________________________________typical operating characteristics (t a = +25?, unless otherwise noted.)
__________applications information operation with supply voltages other than 15v using supply voltages less than ?5v reduces the ana- log signal range. the DG408/dg409 switches operate with ?.5v to ?0v bipolar supplies or with a +4.5v to +40v single supply. connect v- to gnd when operat- ing with a single supply. both device types can also operate with unbalanced supplies, such as +24v and -5v. the typical operating characteristics graphs show typical on-resistance with 20v, 15v, 10v, and 5v supplies. (switching times increase by a factor of two or more for operation at 5v.) overvoltage protection proper power-supply sequencing is recommended for all cmos devices. do not exceed the absolute maxi- mum ratings, because stresses beyond the listed rat- ings may cause permanent damage to the devices. always sequence v+ on first, then v-, followed by the logic inputs, s or d. if power-supply sequencing is not possible, add two small signal diodes in series with supply pins for overvoltage protection (figure 1). adding diodes reduces the analog signal range to 1v below v+ and 1v above v-, but does not affect the devices?low switch resistance and low leakage charac- teristics. device operation is unchanged, and the differ- ence between v+ and v- should not exceed +44v. DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers 6 _______________________________________________________________________________________ ______________________________________________________________pin description v g s d v- v+ DG408 dg409 figure 1. overvoltage protection using external blocking diodes pin DG408 dg409 name function 1, 15, 16 a0, a2, a1 address inputs a0, a1 address inputs 2 2 en enable input 3 3 v- negative supply voltage input 4? s1?4 bidirectional analog inputs 4? s1a?4a bidirectional analog inputs 8 d bidirectional analog output 8, 9 da, db bidirectional analog outputs 9?2 s8?5 bidirectional analog inputs 10?3 s4b?1b bidirectional analog inputs 13 14 v+ positive supply voltage input 14 15 gnd ground 1, 16
DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers _______________________________________________________________________________________ 7 ______________________________________________test circuits/timing diagrams 50% t trans (off) tr < 20ns t f < 20ns v out +3v 0v v s1 0v v s8 or v s4b logic input switch output +15v v out -15v gnd v+ a1 v- a2 a0 en s1 s2-s7 s8 d ?0v +10v 50 w DG408 300 w 35pf +15v v out -15v gnd v+ a0 v- a1 en s1b s1a-s4a s4b db ?0v 50 w dg409 300 w 35pf 90% 90% t trans (on) +10v 50% t off(en) tr < 20ns t f < 20ns v out +3v 0v 0v logic input switch output +15v v out -15v gnd v+ a1 v- a0 a2 en s1 s2-s8 d -5v 50 w DG408 1k 35pf 90% 10% t on(en) +15v v out -15v gnd v+ a1 v- a0 en s1b s1a-s4a s2b-s4b, da db -5v 50 w dg409 1k 35pf figure 2. transition time figure 3. enable switching time
DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers 8 _______________________________________________________________________________________ 50% t open t r < 20ns t f < 20ns v out +3v 0v logic input switch output +15v v out -15v gnd v+ a0 v- a1 a2 en s1-s8 d +5v 50 w DG408 300 w 35pf 80% +2.4v 0v d v out +3v 0v logic input +15v v out -15v gnd v+ a1 v- a0 a2 en d DG408 c l = 1000nf v out s_ channel select r s v s on off off d v out is the measured voltage due to charge transfer error q when the channel turns off. q = c l = d v out _________________________________test circuits/timing diagrams (continued) figure 4. break-before-make interval figure 5. charge injection
DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers _______________________________________________________________________________________ 9 +15v v out -15v gnd v+ a1 v- a0 a2 s8 d DG408 s1 r s = 50 w v in en 10nf r l = 1k w off isolation = 20log v out v in 10nf +15v v out +2.4v -15v gnd v+ a1 v- a0 a2 s8 d DG408 s2 r s = 50 w v in 10nf r l = 1k w crosstalk = 20log v out v in 10nf s1 en +15v -15v gnd v+ a2 v- a1 a0 s8 DG408 channel select s1 d en meter impedance analyzer or equivalent f = 1mhz _________________________________test circuits/timing diagrams (continued) figure 6. off isolation figure 7. crosstalk figure 8. source/drain capacitance
DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers 10 ______________________________________________________________________________________ ________pin configurations/functional diagrams/truth tables (continued) 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 a1 gnd v+ s1b s1a v- en a0 top view dg409 s2b s3b s4b db da s4a s3a s2a dip/so cmos decode logic a1 a0 en s4b s3b s2b s1b s4a s3a s2a s1a da v+ v- gnd db dg409 4-channel differential mux /demux a2 a1 a0 en on switch x 0 0 0 0 1 1 1 1 x 0 0 1 1 0 0 1 1 x 0 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 none 1 2 3 4 5 6 7 8 DG408 logic ??v al 0.8v, logic ??v ah 3 2.4v a1 a0 en on switch x 0 0 1 1 x 0 1 0 1 0 1 1 1 1 none 1 2 3 4 dg409 logic ??v al 0.8v, logic ??v ah 3 2.4v
DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers ______________________________________________________________________________________ 11 _ordering information (continued) * contact factory for dice specifications. ** contact factory for availability. 16 cerdip** -55? to +125? dg409ak 16 cerdip -40? to +85? dg409dk 16 narrow so -40? to +85? dg409dy 16 plastic dip -40? to +85? dg409dj dice* 16 narrow so 16 plastic dip pin-package temp. range 0? to +70? 0? to +70? 0? to +70? dg409c/d dg409cy dg409 cj part
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 1995 maxim integrated products printed usa is a registered trademark of maxim integrated products. DG408/dg409 improved, 8-channel/dual 4-channel, cmos analog multiplexers __________________________________________________________chip topographies v+ s3 en s4 0.136 (3.45mm) 0.080" (2.03mm) ds8 s7 s5 s6 n.c. a0 a1 a2 gnd s2 s1 n.c. v- v+ s3a en s4a 0.136 (3.45mm) 0.080" (2.03mm) da db s4b s1b s2b s3b a0 a1 n.c. gnd s2a s1a n.c. v- transistor count: 122 substrate connected to v+ transistor count: 122 substrate connected to v+ DG408 dg409 n.c. = no internal connection


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